Within electronic designs, the "traditional" and most common way of generating clock signals for ICs of ever-increasing complexity is via a crystal oscillator. Crystal oscillators, however, are not cheap and can be a major cost burden--particularly in portable and handheld designs. High-frequency phase-locked loop (PLL) clock generator ICs, with built-in divider and multiplier circuits, are a much more cost-effective alternative.
PLL clock generator ICs make use of external clock signals that are to be found in most electronic systems, for example from the counter of a CPU. Using this low frequency (a few tens of kilohertz) clock signal as input, they are able to output a clock signal of a few tens of megahertz that can then be used as the main clock signal to another chip.
